1. Field of the Invention
The present invention relates to an electronic-circuit analysis program, method, and apparatus that checks the operation of an electronic circuit through simulation, and particularly to an electronic-circuit analysis program, method, and apparatus that checks the operation of an electronic circuit through simulation of waveform analysis.
2. Description of the Related Arts
With recent years' speedups of electronic circuits, for example, LSI (Large Scale Integration), printed circuit boards (Printed Circuit Board), and multichip modules, an increasing number of design changes in layer configuration and materials of LSIs, packages, and printed circuit boards have a non-negligible influence on signal waveform transmission. For this reason, signal waveform analysis at the time of design and design changes has become increasingly important. FIG. 1 is a block diagram showing one example of an electronic-circuit analysis apparatus. This electronic-circuit analysis apparatus includes a circuit-information input storage unit 300, an analysis-model generating unit 302, an analyzing unit 304, an analysis-result determining unit 306, and a display unit 308. The circuit-information input storage unit 300 has stored therein, as input information, analysis conditions, layout data, element-model data, and parameter data for use in a simulation of an electronic circuit. The analysis conditions include an analysis frequency, analysis time, and others. The layout data is data at the time of designing the board layout. The element-model data is data with electrical characteristics of elements written in a predetermined format. The parameter data represents analysis-purpose parameters corresponding to the material property and shape of the board. The analysis-model generating unit 302 generates an analysis model for simulation based on the input information stored in the circuit-information input storage unit 300, performs a simulation by using the model to be output to the analyzing unit 304, and outputs a waveform calculated with respect to an arbitrary measuring position of the electronic circuit to the analysis-result determining unit 306 and the display unit 308 as an analysis result. The waveform represents, for example, a voltage-value change with time. The analysis-result determining unit 306 uses a predetermined condition to perform a pass/fail determination on the analysis result, and outputs pass or fail as a determination result to the display unit 308. The predetermined condition is, for example, a threshold of a rated voltage of the element described in a data sheet or the like. Here, if a plurality of analysis results are present, the analysis-result determining unit 306 performs a plurality of pass/fail determinations. For example, in the case where the analysis result is a voltage waveform and the threshold for pass/fail determination is a maximum rated voltage value, it is assumed that when a peak value of the voltage value is equal to or lower than the maximum rated voltage value, the determination result indicates passed, and when the peak value exceeds the maximum rated voltage value, the determination result indicates failed. Also, when the threshold for pass/fail determination is VIH (the lower-limit voltage value with which the voltage is determined as High), it is assumed that when the voltage in the analysis result exceeds the threshold VIH during a time when High is expected, the determination result indicates passed, and when the voltage is equal to or lower than the threshold VIH, the determination result indicates failed. The display unit 308 displays the analysis result and passed or failed indicated by the determination result.
[Patent Document 1] Japanese Patent Laid-Open Publication No. 10-21267
Here, LSI manufacturing sources provide an element model for use in signal waveform analysis in a form of an IBIS model (Input/Output Buffer Information Specification Model), SPIC model (an industry-standard model for use in an SPICE-family simulator on the basis of an electronic-circuit simulator developed at University of California at Berkeley), encrypted SPICE model, or the like. These element models have been often revised due to a change in LSI design or a correction of a malfunction in generation conditions and measurement conditions of an element model. Moreover, in recent years, with speedups of LSIs, it has become difficult to design an LSI alone, and it might be the case where a revision of an LSI model requires a change in design of a printed circuit board. In the conventional electronic-circuit analysis apparatus, every time the design of an element model or a printed circuit board is changed, it is required to perform signal waveform analysis and waveform determination to check whether there is a problem in waveform quality and timing conditions of the circuit. However, with speedups and high-density of LSIs and printed circuit boards, the number of nets requiring signal waveform analysis is increasing. To perform all signal waveform analyses for every design change, a large amount of CPU time and manual check time is required. In this case, if an influence of revision of an element model on the waveform under the operation conditions of the circuit is small, it is not required to again perform signal waveform analysis However, to decide whether re-analysis is necessary, there are problems such that expert knowledge is required regarding signal waveform analysis for grasping changes of an element model or the like, and even if such a determination is possible, it takes a long time to perform manual determinations for all analysis targets.